I Put Nam A2-Lite Inside an iRig HD X

The project replaces the iRig HD X’s firmware so its onboard NXP MIMXRT1011DAE5A (500 MHz Cortex‑M7) runs a compact NeuralAmpModeler A2‑Lite amp model entirely on the interface. The A2‑Lite engine (91,204 bytes) and a 7,516‑byte 5150+OD808 capture are stored across the chip’s memory: three 32 KiB FlexRAM banks configured as DTCM (96 KiB) for weights and convolution history, one 32 KiB OCRAM for DMA buffers, program data and stack, and 2 MiB external QSPI for executable code and the model file. The live build uses 91,232 bytes of DTCM (7,072 bytes free) and 10,664 bytes of OCRAM, leaving about 22 KB headroom for the audio machinery. The firmware configures the original codec over I2C and streams stereo audio via SAI/eDMA so the wheel still controls headphone level and both headphone and amp outputs receive the processed signal.

Performance testing moved from 48‑sample (1 ms) blocks to a 16‑frame (0.333 ms) live buffer to meet timing constraints. Measured cycles for 48‑sample blocks averaged ~442,108 of 500,000 available (min/mean/max: 442,052/442,108/442,260). Hand‑tuned DSP kernels missed deadlines; the portable whole‑model floating‑point engine proved fastest. Underruns are handled by restarting SAI streams (audible click then recovery). A 15‑second null test against upstream NeuralAmpModelerCore aligned sample‑for‑sample with a relative null of −115.63 dB, correlation 0.9999999999985, largest sample error 2.811×10⁻⁶ (−111.0 dBFS) and residual RMS −131.83 dBFS, demonstrating near‑bit‑accurate floating‑point parity well below the codec’s analog noise floor.