This reverse-engineering project dissects how the Intel 8087 implements the FPTAN (tangent) instruction by combining CORDIC with a rational polynomial, using die photography and microcode analysis. The 8087 die reveals a microcode ROM (1,648 microinstructions) and a datapath with an exponent ROM, constant ROM, a wide shifter, an adder, B and sum registers, eight stack registers, temporary registers, and a 16-bit shift register that stores CORDIC decision bits. The chip delivers huge speedups (about 90 μs per tangent vs. 13,000 μs on the 8086) by selecting between two paths at runtime based on the input exponent and handling special cases and stack checks in microcode.
The algorithm itself is a hybrid: it runs a 16-step binary CORDIC rotation to reduce the angle efficiently (using arctan(2^-n) table entries, shifts and adds) producing a residual on the order of 2^-16, then applies a Padé approximant 3x/(3−x^2) to finish the calculation with high precision. Microcode branches when exponent ≥ −16 into the CORDIC scan loop, saving decision bits in the shift register; otherwise it goes to the rational path, which squares and scales the residual, computes 3−x^2 and 3x via shifts/adds and a pseudo-multiplication sequence, then forms the ratio. This clever pairing yields both hardware simplicity and full floating-point accuracy beyond plain CORDIC.
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