From 25M instructions to one faulty skip: fault analysis of a secure boot

The case study tests whether a single instruction skip can make an ARM-based router’s boot ROM accept a tampered second-stage bootloader. The ROM normally checks an RSA-2048 PSS signature and uses several fault defenses, including a hardened comparison, control-flow checks, and redundant accept/reject values. The researchers ran the real boot code in emulation, supplying hooks and hardware stubs for peripherals absent from the emulator. With a time-travel trace of the roughly 25-million-instruction boot, they traced the rejection back to a descriptor field: the verification function always returns zero, while separate stores write the accept or reject pattern. A single conditional branch selects between them.

An AI agent handled emulation setup, reverse engineering, trace analysis, and campaign configuration under an analyst’s direction. To make fault testing practical, it extracted the verification function’s real inputs and machine state from the full trace, then used that snapshot to run about 43,000 instructions per test - roughly 600 times less work. A campaign swept instruction skips through the comparison and verification code, seeking the accept pattern for the invalid image. It found a single two-byte instruction whose omission flips the verdict, demonstrating that layered software defenses can still have a vulnerable point. The account emphasizes reproducible traces and evidence, while distinguishing an emulated instruction-skip result from a demonstrated physical attack.