ESP32 can stream I/Q up to 80MSPS 10bit from 2GHz/5GHz by tapping Wifi/BT stage

ESP-SDR is firmware that converts an ESP32-family Wi‑Fi radio into a software‑defined radio by exploiting an undocumented debug path that connects the ADC/DAC to the CPU and bypasses the fixed‑function Wi‑Fi modem. It captures raw complex I/Q samples (signed 8‑bit or packed 10‑bit) at rates up to 80 MS/s and supports reception across an expanded 100-6000 MHz tuning range (with 2.4 GHz and 5 GHz paths available on certain chips). Multiple ESP32 variants are supported (ESP32, C3, C5, C6, C61, S2, S3, S31) with per‑chip capabilities and limits listed; parts of the implementation were produced with LLM assistance to make broader chip support practical.

Capture and control use a simple newline‑terminated ASCII request/response protocol over native USB or a 3.3 V USB‑UART bridge; snapshot commands (CAP16 for 8‑bit, CAP20 for 10‑bit) return a DATA reply containing a fixed binary payload plus CRC32. The firmware can also compute on‑chip FFTs and stream compact spectra instead of raw I/Q; continuous FFT mode runs the RF writer continuously but analyzes selected windows (so some short RF events can be missed), while snapshot FFT pauses between captures. Hardware AGC is default with manual gain available. Build/flash instructions, source layout, test suite and chip‑specific configuration are included to reproduce and extend the setup.