ESP-SDR: Raw IQ Capture with Espressif's ESP32 Chips

ESP-SDR reveals an undocumented capability in Espressif's ESP32 family that taps the chip's internal modem ADC/DAC path to deliver raw complex IQ baseband samples directly to the CPU, eliminating the need for external RTL-SDRs or audio ADCs. Special debug registers configure a sample-dump engine to write 32-bit IQ words into reserved SRAM; a two-bank ring-buffer scheme hands banks between the modem writer and CPU reader. Supported chips include original ESP32, C3, C5, C6, C61, S2, S3 and S31, with tuning roughly 2.2-2.7 GHz (and 4.8-6.0 GHz on C5), sample rates up to 80 MSa/s, analog RX bandwidth ~13-54 MHz, and an IQ format of 32 bits where bits 19-10 = I, 9-0 = Q (signed 10-bit), bits 27-20 = RX gain and bits 31-28 reflect AGC state. Discovery followed reverse engineering of esp’s librftest adctrig function, aided by LLMs.

Practical demos include a browser-based ESP-WebSDR via Web Serial (low duty-cycle spectrum/waterfall) and ESPARGOS One’s phase-coherent eight-channel capture with faster SPI transport and signal-triggered streaming. SoapyESPSDR for the S31 streams IQ over Gigabit Ethernet to GNU Radio and GQRX (continuous 8-16 MSa/s). The key limitation is output throughput: the modem can write 2,560 Mbit/s into SRAM but UART/SPI/USB/GigE links are much slower, forcing low duty-cycle streaming. Transmit capability exists but is not distributed due to misuse risk. The result is a very low-cost, multi-channel SDR platform with phase-coherent capture and potential for localization, special waveforms and on-chip preprocessing.